Output Capacitance (Coss) in GaN Devices Explained: Meaning, Energy Loss, Measurement and Design Impact

GaN Power Electronics Masterclass – Part 36

This lesson is part of the Complete GaN Power Electronics Masterclass.

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Output Capacitance (C_oss) in GaN Devices: Meaning, Energy Loss, Measurement and Design Impact

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Table of Contents

• Introduction
• What is Output Capacitance?
• Internal Capacitances of a GaN HEMT
• Physical Origin of Coss
• Why Coss is Voltage Dependent
• Coss Energy
• Effect on Switching Losses
• Coss in Hard Switching
• Coss in Soft Switching
• Measurement Techniques
• GaN vs Silicon vs SiC Coss Comparison
• Design Considerations
• Applications
• Future Trends
• Frequently Asked Questions
• Conclusion

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Introduction

Output capacitance, commonly written as C_oss, is one of the most important parasitic capacitances in GaN power devices. It directly affects switching loss, voltage transition speed, dead-time behavior, soft-switching design, resonant operation, electromagnetic interference, and converter efficiency. GaN HEMTs are famous for their low charge and fast switching capability, but their output capacitance still stores energy during every switching cycle. In high-frequency converters, even a small amount of stored capacitance energy can become significant because it is charged and discharged thousands or millions of times per second. Understanding C_oss is essential for designing efficient USB-C fast chargers, AI data center power supplies, electric vehicle onboard chargers, point-of-load converters, telecom power supplies, LLC resonant converters, and high-frequency DC-DC converters.

Key Takeaway C_oss is the effective drain-to-source output capacitance of a power transistor. In GaN devices, low C_oss helps reduce switching losses and enables high-frequency operation, but its stored energy must still be considered carefully in converter design.

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What is Output Capacitance?

Output capacitance is the capacitance seen between the drain and source terminals of a transistor when the gate is shorted to the source. It is not a separate physical capacitor added externally. Instead, it is formed by the internal device structure and electric fields inside the transistor.

For a power transistor, output capacitance is commonly defined as:

Coss = Cds + Cgd

Where:

Coss = Output capacitance
Cds  = Drain-to-source capacitance
Cgd  = Gate-to-drain capacitance

Because C_gd is also part of the Miller capacitance, C_oss interacts with switching speed and drain voltage transition behavior.

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Internal Capacitances of a GaN HEMT

A GaN HEMT contains several internal capacitances due to its metal contacts, gate structure, passivation layers, and semiconductor junction regions.

Capacitance	Meaning	Importance
Ciss	Input capacitance	Affects gate-drive requirement.
Coss	Output capacitance	Affects switching loss and voltage transition.
Crss	Reverse transfer capacitance	Affects Miller effect and false turn-on risk.
Cgd	Gate-to-drain capacitance	Controls Miller plateau behavior.
Cds	Drain-to-source capacitance	Main contributor to output capacitance.

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Physical Origin of C_oss

C_oss comes from the electric field stored between the drain and source regions when the device blocks voltage. In the OFF state, the drain voltage rises and the electric field spreads through the device structure. This field stores energy in the depletion and access regions of the transistor.

Drain Voltage Applied

↓

Electric Field Forms

↓

Charge Separation Occurs

↓

Device Stores Energy

↓

Effective Output Capacitance Appears

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Why C_oss is Voltage Dependent

Output capacitance is not constant. It changes strongly with drain-to-source voltage. At low voltage, the capacitance is relatively high because the electric field region is small. As voltage increases, the depletion region expands and the effective capacitance decreases.

Drain Voltage Condition	Coss Behavior
Low VDS	Coss is high.
Medium VDS	Coss decreases.
High VDS	Coss becomes much lower.

Engineering Insight Because C_oss is voltage dependent, using a single capacitance value from a datasheet can be misleading. Designers should also examine C_oss energy, often listed as E_oss, because it better represents real switching loss.

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C_oss Energy

C_oss energy, commonly written as E_oss, is the energy stored in the output capacitance when the device is charged to a specific drain voltage. This energy must go somewhere during switching. In hard-switching converters, much of this stored energy is dissipated as loss. In soft-switching converters, the circuit may recover or recycle this energy through resonant operation.

Drain Voltage Charges Coss

↓

Energy Stored in Output Capacitance

↓

Device Switches

↓

Energy is Dissipated or Recycled

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Effect of C_oss on Switching Losses

When a transistor switches, the output capacitance charges and discharges. At high switching frequency, this repeated charging and discharging becomes a major source of switching loss.

• Higher C_oss increases switching energy.
• Higher drain voltage increases stored energy.
• Higher switching frequency increases total loss.
• Lower C_oss improves high-frequency efficiency.
• C_oss affects voltage slew rate.
• C_oss influences dead-time behavior in half-bridge circuits.

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C_oss in Hard Switching

In hard-switching operation, the transistor turns ON while drain-source voltage is still present. The energy stored in C_oss is usually dissipated inside the device during turn-on. This increases switching loss and junction temperature.

Hard Switching:

High VDS Present

↓

Device Turns ON

↓

Coss Energy Discharges

↓

Energy Becomes Heat

↓

Switching Loss Increases

This is why low C_oss and low E_oss are extremely important in high-frequency hard-switched converters.

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C_oss in Soft Switching

In soft-switching converters, such as LLC resonant converters or zero-voltage-switching half-bridges, the circuit intentionally charges and discharges C_oss before the transistor turns ON. If the drain-source voltage is reduced close to zero before turn-on, switching loss is greatly reduced.

Soft Switching:

Resonant Current Flows

↓

Coss Charges/Discharges

↓

VDS Falls Near Zero

↓

Device Turns ON

↓

Switching Loss Reduces

In this case, C_oss becomes part of the resonant transition and must be considered during converter timing design.

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Measurement Techniques

C_oss is typically measured using a capacitance-voltage analyzer or semiconductor parameter analyzer. The measurement is performed by shorting gate and source, applying drain-source voltage, and measuring the small-signal capacitance.

Measurement	Purpose
C-V Measurement	Measures capacitance as a function of voltage.
Datasheet Coss Curve	Shows voltage-dependent capacitance.
Eoss Measurement	Determines stored output capacitance energy.
Double Pulse Test	Evaluates switching loss and voltage transition behavior.
Resonant Ring Test	Useful for extracting capacitance in resonant circuits.

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GaN vs Silicon vs SiC Output Capacitance

Parameter	Silicon MOSFET	SiC MOSFET	GaN HEMT
Coss	Higher	Moderate	Low
Eoss	Higher	Moderate	Low
High-Frequency Suitability	Limited	Good	Excellent
Soft-Switching Performance	Moderate	Good	Excellent
Power Density	Moderate	High	Very High

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Design Considerations

• Use E_oss instead of only C_oss for switching-loss estimation.
• Check C_oss versus V_DS curve in the datasheet.
• Optimize dead time in half-bridge circuits.
• Use soft switching where possible.
• Minimize parasitic inductance in PCB layout.
• Account for C_oss in resonant converter design.
• Evaluate switching behavior using double pulse testing.
• Compare devices using both R_DS(on) and E_oss.

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Applications Where C_oss Matters

• LLC resonant converters.
• High-frequency buck converters.
• AI data center voltage regulators.
• Electric vehicle onboard chargers.
• USB-C fast chargers.
• Telecommunication power supplies.
• Solar microinverters.
• Battery energy storage converters.
• Wireless power transfer systems.
• High-density point-of-load converters.

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Future Trends

• Ultra-low E_oss GaN devices.
• Better capacitance modeling.
• Integrated GaN power stages.
• Advanced soft-switching topologies.
• MHz-class power converters.
• AI-assisted switching optimization.
• Low-parasitic packaging.
• Improved datasheet capacitance characterization.

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Frequently Asked Questions (FAQs)

What is C_oss?

C_oss is the output capacitance of a transistor, usually defined as the sum of drain-source capacitance and gate-drain capacitance.

Why is C_oss important in GaN devices?

It affects switching loss, voltage transition speed, dead-time behavior, soft-switching performance, EMI, and converter efficiency.

Is C_oss constant?

No. C_oss is strongly voltage dependent and decreases as drain-source voltage increases.

What is E_oss?

E_oss is the energy stored in the output capacitance at a given drain voltage. It is often more useful than C_oss alone for switching-loss estimation.

Why does GaN have lower C_oss than silicon MOSFETs?

GaN devices have a different high-mobility lateral device structure, smaller charge storage, and lower parasitic capacitance, which enables faster switching and lower output capacitance energy.

How does C_oss affect soft switching?

In soft switching, circuit current charges or discharges C_oss before turn-on, allowing the device to switch at near-zero voltage and reduce switching loss.

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Conclusion

Output capacitance C_oss is one of the most important switching-related parameters in GaN power devices. It determines how much energy is stored between the drain and source terminals during voltage blocking and strongly influences hard-switching loss, soft-switching behavior, dead-time optimization, EMI, and converter efficiency. GaN devices generally offer lower C_oss and lower E_oss than conventional silicon MOSFETs, making them highly suitable for high-frequency and high-power-density converters. However, because C_oss is voltage dependent, designers must carefully study capacitance curves, E_oss data, and real switching waveforms instead of relying on a single capacitance value. As power electronics moves toward MHz-class operation, compact magnetic components, and ultra-high-density power converters, understanding and optimizing C_oss will remain essential for successful GaN-based converter design.

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Continue Learning

• Gate Charge (Q_g) Explained
• Threshold Voltage of GaN Transistors
• Miller Effect in GaN HEMTs
• Switching Loss Calculation in GaN Devices
• Soft Switching in GaN Converters

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