Driving Cascode GaN Devices: Internal Structure, Gate Drive Requirements, and Design Guidelines
This lesson is part of the Complete GaN Power Electronics Masterclass.
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Driving Cascode GaN Devices: Internal Structure, Gate Drive Requirements, and Design Guidelines
Table of Contents
- Introduction
- What is a Cascode GaN Transistor?
- Internal Structure of a Cascode GaN Device
- Why the Cascode Structure Exists
- How the Internal Silicon MOSFET and GaN HEMT Interact
- Turn-On Sequence in a Cascode Device
- Turn-Off Sequence in a Cascode Device
- Gate Drive Requirements for Cascode GaN
- Internal Node Voltage Behavior
- Cascode vs Direct-Drive p-GaN: Key Differences
- Reverse Conduction in Cascode Devices
- Switching Speed Considerations
- Gate Driver Selection for Cascode GaN
- PCB Layout Considerations
- Common Design Mistakes
- GaN vs Silicon MOSFET Drive Comparison
- Design Checklist
- Applications
- Future Trends
- Frequently Asked Questions
- Conclusion
Introduction
Not every GaN transistor on the market is a pure enhancement-mode device driven directly at its native GaN gate. A significant category of commercial GaN power transistors uses what is called a cascode structure, where a low-voltage silicon MOSFET is combined internally with a high-voltage depletion-mode GaN HEMT to create a composite device that behaves, from the outside, like a normal enhancement-mode transistor. This approach was one of the earliest ways manufacturers brought GaN power transistors to market, since native depletion-mode GaN HEMTs are naturally ON at zero gate voltage, which is not a safe or convenient default state for most power converter applications.
From a system designer's point of view, a cascode GaN device looks deceptively familiar, its external gate drive requirements often resemble a silicon MOSFET more than a native p-GaN device. But understanding what is actually happening inside the package is important, because it explains several behaviors, from switching speed limitations to internal node ringing, that would otherwise seem puzzling. This article explains the cascode structure in detail and gives practical gate drive guidance for working with these devices.
What is a Cascode GaN Transistor?
A cascode GaN transistor is a composite power device built from two series-connected transistors packaged as a single component: a high-voltage, normally-ON depletion-mode GaN HEMT, and a low-voltage, normally-OFF silicon MOSFET. The external gate and source terminals of the package correspond to the silicon MOSFET's gate and source, so the user drives and controls the device exactly as they would a conventional enhancement-mode silicon MOSFET, while the GaN HEMT does the heavy lifting of blocking high voltage and conducting the main current.
Internal Structure of a Cascode GaN Device
External Drain (D)
│
GaN HEMT (Depletion Mode, High Voltage)
│
Internal Midpoint Node
│
Silicon MOSFET (Enhancement Mode, Low Voltage)
│
External Source (S)
External Gate (G) ── Connected to Silicon MOSFET Gate Only
The GaN HEMT's gate is internally tied to the source of the silicon MOSFET, not brought out to the package pins at all. This is the key structural detail that makes the cascode arrangement work: the GaN HEMT's own gate-source voltage is set automatically by the internal circuit topology, not directly commanded by the external driver.
Why the Cascode Structure Exists
- Native depletion-mode GaN HEMTs are normally ON at zero gate voltage, which is undesirable and potentially unsafe as a default power converter state.
- Building a reliable, high-yield enhancement-mode GaN HEMT directly was historically more difficult than combining a mature, low-voltage silicon MOSFET with an established depletion-mode GaN process.
- The cascode approach allowed early commercial GaN power transistors to reach the market with familiar, silicon MOSFET-like gate drive requirements, easing adoption for designers already experienced with silicon.
- It leverages the high breakdown voltage and low on-resistance of the GaN HEMT while relying on the well-understood, low-voltage switching behavior of silicon for the actual gate control.
How the Internal Silicon MOSFET and GaN HEMT Interact
Because the GaN HEMT's gate is tied to the silicon MOSFET's source, the GaN HEMT's own gate-source voltage is determined by the voltage at the internal midpoint node relative to the external source. When the silicon MOSFET is OFF, the midpoint node rises, which drives the GaN HEMT's effective gate-source voltage negative relative to its own source, turning the depletion-mode HEMT OFF as well. When the silicon MOSFET turns ON, it pulls the midpoint node down close to the external source voltage, bringing the GaN HEMT's gate-source voltage back toward zero, which is enough to turn the naturally-ON depletion-mode HEMT back ON.
Turn-On Sequence in a Cascode Device
1. External Gate Driver Applies Positive VGS to Silicon MOSFET 2. Silicon MOSFET Turns ON 3. Internal Midpoint Node Voltage Falls Toward External Source 4. GaN HEMT Gate-Source Voltage Rises Toward Zero 5. GaN HEMT Turns ON (Depletion Mode, Naturally Conducting Near VGS = 0) 6. Full Device Now Conducts Drain to Source
Turn-Off Sequence in a Cascode Device
1. External Gate Driver Removes VGS from Silicon MOSFET 2. Silicon MOSFET Turns OFF 3. Internal Midpoint Node Voltage Rises as Drain Voltage Increases 4. GaN HEMT Gate-Source Voltage Becomes Negative Relative to Its Own Source 5. GaN HEMT Turns OFF Once Threshold is Crossed 6. Full Device Now Blocks Voltage Drain to Source
Notice that the silicon MOSFET turns off first, and the GaN HEMT turns off shortly after, as a consequence of the rising midpoint node voltage rather than a direct external command. This sequencing is inherent to the cascode topology and happens automatically within nanoseconds during every switching transition.
Gate Drive Requirements for Cascode GaN
| Parameter | Typical Cascode GaN Behavior |
|---|---|
| Gate Drive Voltage | Often similar to a standard silicon MOSFET, commonly in the 10 V range depending on manufacturer |
| Gate Threshold Voltage | Set by the internal silicon MOSFET, generally with a wider margin than native p-GaN devices |
| Turn-Off Voltage | 0 V is typically sufficient, similar to silicon MOSFET practice |
| Driver Compatibility | Often compatible with drivers originally designed for silicon MOSFETs |
Internal Node Voltage Behavior
The internal midpoint node between the silicon MOSFET and the GaN HEMT is not directly accessible from outside the package, but its behavior still matters. Because it swings between roughly the silicon MOSFET's drain-source voltage during turn-off and near zero during turn-on, it forms an internal high dv/dt node that can interact with the package's internal parasitic capacitance and inductance, contributing to switching losses and internal ringing that are entirely hidden from the external designer's direct observation, though they still appear indirectly in the external drain-source waveform.
Cascode vs Direct-Drive p-GaN: Key Differences
| Aspect | Cascode GaN | Direct-Drive p-GaN |
|---|---|---|
| Internal Structure | Silicon MOSFET plus depletion-mode GaN HEMT in series | Single native enhancement-mode GaN HEMT |
| Gate Drive Voltage | Often similar to silicon MOSFET levels | Typically lower, tightly specified by manufacturer |
| Threshold Voltage Margin | Generally wider, silicon-like | Generally narrower |
| Switching Speed | Can be limited by internal node dynamics | Often faster, since drive acts directly on the GaN channel |
| Driver Compatibility | Often works with conventional silicon MOSFET drivers | Usually requires a GaN-specific driver |
Reverse Conduction in Cascode Devices
Reverse conduction behavior in a cascode device is also shaped by its composite structure. When reverse current is forced through the device, both the internal silicon MOSFET's body diode and the GaN HEMT's own reverse conduction characteristics come into play, and the resulting reverse voltage drop and recovery behavior can differ noticeably from what would be expected from either device alone. Designers working with hard-switched topologies that rely on body diode conduction during dead time should specifically check the cascode manufacturer's reverse conduction characteristics rather than assuming standard silicon MOSFET body diode behavior.
Switching Speed Considerations
- The internal midpoint node adds an extra dynamic element that can limit how fast the composite device switches compared to a native single-stage GaN HEMT.
- Internal parasitic inductance and capacitance between the two internal die contribute additional switching loss not present in a single-die device.
- Despite these effects, cascode GaN devices still generally switch significantly faster than equivalent silicon MOSFETs, since the high-voltage blocking is still handled by the GaN HEMT.
- Datasheet switching loss figures for cascode devices should be evaluated under the intended operating conditions, since internal node behavior can be sensitive to voltage and current operating point.
Gate Driver Selection for Cascode GaN
- A driver designed for silicon MOSFETs is often a reasonable starting point, given the similar external gate drive voltage range.
- Peak current capability should still be matched to the actual gate charge of the internal silicon MOSFET stage, as specified in the cascode device's datasheet.
- UVLO and other protection features should be selected based on the cascode device's specified threshold and drive voltage, not assumed from generic silicon MOSFET norms.
- For half-bridge cascode designs, the same floating supply and CMTI considerations discussed earlier in this masterclass still apply to the high-side driver.
PCB Layout Considerations
- Standard gate loop and power loop minimization practices still apply, since the package-level parasitics are in addition to, not a replacement for, external layout parasitics.
- Kelvin source connections remain beneficial where the package provides a dedicated Kelvin pin.
- Because switching speed may be somewhat lower than native p-GaN devices, dv/dt and di/dt immunity margins may be comparatively easier to achieve, though they should still be verified rather than assumed.
Common Design Mistakes
- Assuming a cascode device can be driven with identical settings to a native p-GaN device from a different manufacturer.
- Ignoring reverse conduction datasheet specifications and assuming standard silicon MOSFET body diode behavior.
- Overlooking internal node dynamics when diagnosing unexpected switching loss or ringing that does not match a simple single-device model.
- Selecting a gate driver based only on external voltage compatibility without checking actual gate charge and current requirements.
GaN vs Silicon MOSFET Drive Comparison
| Parameter | Silicon MOSFET | Cascode GaN |
|---|---|---|
| Typical Gate Drive Voltage | 10 V to 12 V | Often similar, manufacturer-specific |
| Threshold Voltage Margin | Wide | Generally wide, silicon-like |
| Switching Speed | Moderate | Faster than silicon, though internal node limited |
| Reverse Conduction | Standard body diode behavior | Composite behavior, check datasheet |
Design Checklist
| Checklist Item | Status |
|---|---|
| Gate drive voltage matched to cascode device datasheet, not assumed generic | Verify datasheet |
| Driver peak current matched to internal silicon MOSFET gate charge | Check driver selection |
| Reverse conduction characteristics reviewed for dead-time operation | Review datasheet |
| Standard gate and power loop layout practices applied | Layout review |
| Switching loss verified at actual operating point, not just datasheet typical values | Bench test |
Applications
- General-purpose high-voltage DC-DC converters where silicon MOSFET-like drive simplifies design transition.
- Retrofitting existing silicon MOSFET-based designs with a GaN drop-in for efficiency improvement.
- Motor drive inverters where familiar gate drive characteristics ease system integration.
- Industrial power supplies transitioning from silicon to GaN incrementally.
- Applications prioritizing driver compatibility and design familiarity over the absolute fastest switching speed.
Future Trends
- Continued refinement of cascode packaging to reduce internal parasitic inductance and capacitance.
- Narrowing performance gap between cascode and native enhancement-mode GaN as both technologies mature.
- Increased availability of drivers specifically characterized for cascode GaN internal node behavior.
- Growing use of cascode GaN as an accessible entry point for designers transitioning from silicon to wide bandgap technology.
Frequently Asked Questions (FAQs)
What is a cascode GaN transistor?
It is a composite power device combining a low-voltage silicon MOSFET with a high-voltage depletion-mode GaN HEMT in series, packaged so that it behaves externally like a normal enhancement-mode transistor.
Why is a silicon MOSFET combined with a GaN HEMT in a cascode device?
Native depletion-mode GaN HEMTs are normally ON at zero gate voltage, which is not a safe default state for most power converters. The internal silicon MOSFET provides a normally-OFF, enhancement-mode external gate behavior while the GaN HEMT handles the high-voltage blocking and low on-resistance conduction.
Can I drive a cascode GaN device like a silicon MOSFET?
In many cases the external gate drive voltage and driver compatibility are similar to a silicon MOSFET, but the actual gate charge, reverse conduction behavior, and internal node dynamics should always be checked against the specific device's datasheet.
Why does the GaN HEMT inside a cascode device turn off automatically?
Because its gate is internally tied to the silicon MOSFET's source, when the silicon MOSFET turns off and the internal midpoint node voltage rises, the GaN HEMT's effective gate-source voltage becomes negative relative to its own source, turning it off as a consequence of the circuit topology rather than a direct external command.
Is a cascode GaN device slower than a native p-GaN device?
Often somewhat, because the internal midpoint node adds an additional dynamic element and extra parasitic inductance and capacitance between the two internal die, though cascode devices still generally switch significantly faster than equivalent silicon MOSFETs.
Does reverse conduction work the same way in cascode and native GaN devices?
No, reverse conduction in a cascode device involves both the internal silicon MOSFET's body diode and the GaN HEMT's own reverse conduction characteristics, producing composite behavior that should be checked against the specific datasheet rather than assumed from either device alone.
What gate driver features matter most for cascode GaN?
Matching peak current capability to the actual gate charge of the internal silicon MOSFET stage, and selecting UVLO thresholds based on the cascode device's specified drive voltage rather than generic silicon MOSFET assumptions.
Do half-bridge floating supply requirements change for cascode GaN?
The same floating supply, bootstrap, and CMTI considerations used for any high-side gate driver still apply, since the external gate drive interface of a cascode device functions similarly to a conventional high-side switch in this respect.
What is the biggest design mistake when working with cascode GaN devices?
Assuming they can be treated identically to either a native p-GaN device or a standard silicon MOSFET in every respect, when in fact their internal composite structure introduces its own specific reverse conduction and switching dynamics that need to be verified from the datasheet.
Why might a designer choose cascode GaN over native enhancement-mode GaN?
Cascode devices often offer more familiar, silicon MOSFET-like gate drive requirements, which can ease the transition for designers and systems originally built around silicon MOSFET drive circuitry, while still delivering much of GaN's efficiency benefit.
Conclusion
Cascode GaN transistors occupy a practical middle ground between traditional silicon MOSFETs and native enhancement-mode GaN HEMTs, combining a familiar, silicon-like external gate drive interface with the high-voltage blocking and low on-resistance advantages of GaN. Driving one correctly does not require dramatically different techniques from driving a silicon MOSFET at the schematic level, but understanding the internal series structure, the automatic turn-off sequencing of the GaN HEMT, and the composite reverse conduction behavior helps explain switching loss, ringing, and dead-time behavior that would otherwise be difficult to diagnose. For designers transitioning from silicon to GaN, or for applications where driver compatibility and design familiarity matter as much as absolute switching speed, cascode GaN devices remain a practical and well-proven choice.
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